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2025-06-09 - 20:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack9slot0.osadl.org (updated Mon Jun 09, 2025 12:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
"interval":200,6613
"cycles":100000000,6612
"load":"idle",6611
"condition":{6610
"clock":"2300"6608
"family":"x86",6607
"vendor":"Intel",6606
"processor":{6604
"dataset":"2024-01-08T15:38:01+01:00"6602
"origin":"2024-01-08T12:43:22+01:00",6601
"timestamps":{6600
"granularity":"microseconds"6598
4011:31:286596
37,11:31:256595
36,11:31:246594
35,11:31:236593
"maxima":[6592
011:30:486589
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*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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